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HT27C4096 cmos 256k 16-bit otp eprom block diagram rev. 1.10 1 november 21, 2002 features operating voltage: +5.0v programming voltage v pp =12.5v 0.2v v cc =6.0v 0.2v high-reliability cmos technology latch-up immunity to 100ma from -1.0v to v cc +1.0v cmos and ttl compatible i/o low power consumption active: 30ma max. standby: 1 a typ. 256k 16-bits organization fast read access time: 70ns fast programming algorithm programming time 75 s typ. two line controls (oe and ce ) standard product identification code commercial temperature range (0 cto+70 c) 40-pin plastic dip, 44-pin plcc package general description the HT27C4096 chip family is a low-power, 4096k (4,194,304) bits, +5v electrically one-time programma - ble (otp) read-only memories (eprom). organized into 256k words with 16 bits per word, it features a fast single address location programming, typically at 75 s per word. any word can be accessed in less than 70ns with respect to spec. this eliminates the need for wait states in high-performance microprocessor systems. the HT27C4096 has separate output enable (oe ) and chip enable (ce ) controls which eliminate bus conten - tion issues.

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pin assignment pin description pin name i/o/p description vpp p program voltage supply ce i chip enable dq0~dq15 i/o data inputs/outputs vss negative power supply, ground oe i output enable a0~a17 i address inputs vcc positive power supply absolute maximum rating operation temperature commercial ................................................................................................. .........0 cto+70 c storage temperature............................................................................................................. ................ 65 cto125 c applied v cc voltage with respect to vss ................................................................................................. 0.6v to 7.0v applied voltage on input pin with respect to vss..................................................................................... 0.6v to 7.0v applied voltage on output pin with respect to vss ......................................................................... 0.6v to v cc +0.5v applied voltage on a9 pin with respect to vss ...................................................................................... 0.6v to 13.5v applied v pp voltage with respect to vss ................................................................................................ 0.6v to 13.5v applied read voltage (functionality is guaranteed between these limits) ..............................................+4.5v to +5.5v note: these are stress ratings only. stresses exceeding the range specified under absolute maximum ratings may cause substantial damage to the device. functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil - ity. HT27C4096 rev. 1.10 2 november 21, 2002 + $ , - , . , / , 0 , ' , + , , , 1 , & , $ 1 - 1 . 1 / 1 0 1 ' 1 + 1 , 1 1 1 & & 1 , + ' 0 / . - & $ & & & 1 & , & + & ' & 0 & / & . & - 1 $

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d.c. characteristics symbol parameter test conditions min. typ. max. unit v cc conditions read operation v oh output high level 5v i oh = 0.4ma 2.4 v v ol output low level 5v i ol =2.1ma 0.45 v v ih input high level 5v 2 v cc +0.5 v v il input low level 5v 0.3 0.8 v i li input leakage current 5v v in =0 to 5.5v 5 5 a i lo output leakage current 5v v out =0 to 5.5v 10 10 a i cc vcc active current 5v ce =v il , f=5mhz, i out =0ma 30 ma i sb1 standby current (cmos) 5v ce =v cc 0.3v 110 a i sb2 standby current (ttl) 5v ce =v ih 1ma i pp vpp read/standby current 5v ce =oe =v il , v pp =v cc 100 a programming operation v oh output high level 6v i oh = 0.4ma 2.4 v v ol output low level 6v i ol =2.1ma 0.45 v v ih input high level 6v 0.7v cc v cc +0.5 v v il input low level 6v 0.5 0.8 v i li input load current 6v v in =v il ,v ih 5 a v h a9 product id voltage 6v 11.5 12.5 v i cc vcc supply current 6v 40 ma i pp vpp supply current 6v ce =v il 10 ma capacitance c in input capacitance 5v v in =0v 812pf c out output capacitance 5v v out =0v 812pf c vpp vpp capacitance 5v v pp =0v 18 25 pf a.c. characteristics ta=+25 c 5 c symbol parameter test conditions min. typ. max. unit v cc conditions read operation t acc address to output delay 5v ce =oe =v il 70 ns t ce chip enable to output delay 5v oe =v il 70 ns t oe output enable to output delay 5v ce =v il 30 ns t df ce or oe high to output float, whichever occurred first 5v 25 ns t oh output hold from address, ce or oe , whichever occurred first 5v 0 ns HT27C4096 rev. 1.10 3 november 21, 2002
symbol parameter test conditions min. typ. max. unit v cc conditions programming operation t as address setup time 6v 2 s t oes oe setup time 6v 2 s t ds data setup time 6v 2 s t ah address hold time 6v 0 s t dh data hold time 6v 2 s t dfp output enable to output float delay 6v 0 130 ns t vps vpp setup time 6v 2 s t pw ce program pulse width 6v 50 75 105 s t vcs vcc setup time 6v 2 s t ces ce setup time 6v 2 s t oe data valid from oe 6v 150 ns t prt vpp pulse rise time during pro - gramming 6v 2 s test waveforms and measurements output test load HT27C4096 rev. 1.10 4 november 21, 2002 1 3 + " $ 3 + ' "
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HT27C4096 rev. 1.10 5 november 21, 2002 functional description programming of the HT27C4096 when the HT27C4096 is delivered, the chip has all 4096k bits in the one , or high state. zeros are loaded into the HT27C4096 through programming. the programming mode is entered when 12.5 0.2v is ap - plied to the vpp pin, oe is at v ih , and ce is v il . for pro - gramming, the data to be programmed is applied with 16 bits in parallel to the data pins. the programming flowchart in figure 3 shows the fast interactive programming algorithm. the interactive al - gorithm reduces programming time by using 50 sto 105 s programming pulses and giving each address only as many pulses as is necessary in order to reliably program the data. after each pulse is applied to a given address, the data in that address is verified. if the data is not verified, additional pulses are given until it is veri - fied or until the maximum number of pulses is reached while sequencing through each address of the HT27C4096. this process is repeated while sequenc - ing through each address of the HT27C4096. this part of the programming algorithm is done at v cc =6.0v to assure that each eprom bit is programmed to a suffi - ciently high threshold voltage. this ensures that all bits have sufficient margin. after the final address is com- pleted, the entire eprom memory is read at v cc =v pp =5.25 0.25v to verify the entire memory. program inhibit mode programming of multiple HT27C4096 in parallel with dif- ferent data is also easily accomplished by using the pro- gram inhibit mode. except for ce , all like inputs of the parallel HT27C4096 may be common. a ttl low-level pro- gram pulse applied to an HT27C4096 ce input with vpp=12.5 0.2v, and oe high will program that HT27C4096. a high-level ce input inhibits the HT27C4096 from being programmed. program verify mode verification should be performed on the programmed bits to determine whether they were correctly pro - grammed. the verification should be performed with oe at v il , and ce at v ih , and vpp at its programming volt - age. auto product identification the auto product identification mode allows the reading out of a binary code from an eprom that will identify its manufacturer and the type. this mode is intended for programming to automatically match the device to be programmed with its corresponding programming algo - rithm. this mode is functional in the 25 c 5 c ambient temperature range that is required when programming the HT27C4096. to activate this mode, the programming equipment must force 12.0 0.5v on the address line a9 of the HT27C4096. two identifier bytes may then be sequenced from the device outputs by toggling address line a0 from v il to v ih , when a1=v ih . all other address lines must be held at v ih during auto product identification mode. byte 0 (a0=v il ) represents the manufacturer code, and byte 1 (a0=v ih ), the device code. for HT27C4096, these two identifier bytes are given in the operation mode truth table. when a1=v il , the HT27C4096 will read out the bi - nary code of 7f, continuation code, to signify the unavail - ability of manufacturer id codes. read mode the HT27C4096 has two control functions, both of which must be logically satisfied in order to obtain data at outputs. chip enable (ce ) is the power control and should be used for device selection. output enable (oe ) is the output control and should be used to gate data to the output pins, independent of device selection. as - suming that addresses are stable, address access time (t acc ) is equal to the delay from ce to output (t ce ). data is available at the outputs (t oe ) after the falling edge of oe , assuming the ce has been low and addresses have been stable for at least t acc -t oe . standby mode the HT27C4096 has cmos standby mode which re- duces the maximum v cc current to 10 a. it is placed in cmos standby when ce is at v cc 0.3v. the HT27C4096 also has a ttl-standby mode which re- duces the maximum v cc current to 1.0ma. it is placed in ttl-standby when ce is at v ih . when in standby mode, the outputs are in a high-impedance state, independent of the oe input. two-line output control function to accommodate multiple memory connections, a two-line control function is provided to allow for: low memory power dissipation assurance that output bus contention will not occur it is recommended that ce be decoded and used as the primary device-selection function, while oe be made a common connection to the read line from the system control bus. this assures that all deselected memory devices are in their low-power standby mode and that the output pins are only active when data is desired from a particular memory device. system considerations during the switch between active and standby condi - tions, transient current peaks are produced on the rising and falling edges of chip enable. the magnitude of
product identification code code pins hex data a0 a1 dq7 dq6 dq5 dq4 dq3 dq2 dq1 dq0 manufacturer 01000111001c device type 110000010105 continuation 00011111117f 10011111117f HT27C4096 rev. 1.10 6 november 21, 2002 these transient current peaks is dependent on the out - put capacitance loading of the device. at a minimum, a 0.1 f ceramic capacitor (high frequency, low inherent inductance) should be used on each device between vcc and vpp to minimize transient effects. in addition, to overcome the voltage drop caused by the inductive effects of the printed circuit board traces on eprom ar - rays, a 4.7 f bulk electrolytic capacitor should be used between vcc and vpp for each eight devices. the lo - cation of the capacitor should be close to where the power supply is connected to the array. operation mode truth table all the operation modes are shown in the table following. mode ce oe a0 a1 a9 vpp output read v il v il xx x v cc dout output disable v il v ih xx x v cc high z standby (ttl) v ih xx x x v cc high z standby (cmos) v cc 0.3v xx x x v cc high z program v il v ih xx x v pp d in program verify x v il xx x v pp d out product inhibit v ih xx x x v pp high z manufacturer code (3) v il v il v il v ih v h (1) v cc 1c device type code (3) v il v il v ih v ih v h (1) v cc 05 note: (1) v h = 12.0v 0.5v (2) x=either v ih or v il (3) for manufacturer code and device code, a1=v ih , when a1=v il , both codes will read 7f ( "
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( figure 1. a.c. waveforms for read operation
HT27C4096 rev. 1.10 7 november 21, 2002 (
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HT27C4096 rev. 1.10 8 november 21, 2002 > ; * "

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package information 40-pin dip (600mil) outline dimensions symbol dimensions in mil min. nom. max. a 2045 2065 b 535 555 c 145 155 d 125 145 e16 20 f50 70 g 100 h 595 615 i 635 670 0 15 HT27C4096 rev. 1.10 9 november 21, 2002 + $ & 1 & 1 $
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44-pin plcc outline dimensions symbol dimensions in mil min. nom. max. a 680 700 b 648 658 c 680 700 d 648 658 e 145 155 f 190 g20 h 50 i16 22 j24 32 k8 12 0 10 HT27C4096 rev. 1.10 10 november 21, 2002 0 & + + + $ / , - & / & . 1 . 1 -
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product tape and reel specifications reel dimensions plcc 44 symbol description dimensions in mm a reel outer diameter 330 1.0 b reel inner diameter 100 0.1 c spindle hole diameter 13.0+0.5 0.2 d key slit width 2.0 0.5 t1 space between flange 32.8+0.3 0.2 t2 reel thickness 38.2 0.2 HT27C4096 rev. 1.10 11 november 21, 2002
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carrier tape dimensions plcc 44 symbol description dimensions in mm w carrier tape width 32.0 0.3 p cavity pitch 24.0 0.1 e perforation position 1.75 0.1 f cavity to perforation (width direction) 14.2 0.1 d perforation diameter 1.5+0.1 d1 cavity hole diameter 2.0 min. p0 perforation pitch 4.0 0.1 p1 cavity to perforation (length direction) 2.0 0.1 a0 cavity length 18.0 0.1 b0 cavity width 18.0 0.1 k1 cavity depth na k2 cavity depth 4.9 0.1 t carrier tape thickness 0.33 0.05 c cover tape width 21.3 HT27C4096 rev. 1.10 12 november 21, 2002 ) & ) & ) $ ( ; 1 $ $ = &

HT27C4096 rev. 1.10 13 november 21, 2002 copyright
2002 by holtek semiconductor inc. the information appearing in this data sheet is believed to be accurate at the time of publication. however, holtek as - sumes no responsibility arising from the use of the specifications described. the applications mentioned herein are used solely for the purpose of illustration and holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. holtek reserves the right to alter its products without prior notification. for the most up-to-date information, please visit our web site at http://www.holtek.com.tw. holtek semiconductor inc. (headquarters) no.3, creation rd. ii, science-based industrial park, hsinchu, taiwan tel: 886-3-563-1999 fax: 886-3-563-1189 http://www.holtek.com.tw holtek semiconductor inc. (sales office) 11f, no.576, sec.7 chung hsiao e. rd., taipei, taiwan tel: 886-2-2782-9635 fax: 886-2-2782-9636 fax: 886-2-2782-7128 (international sales hotline) holtek semiconductor (shanghai) inc. 7th floor, building 2, no.889, yi shan rd., shanghai, china tel: 021-6485-5560 fax: 021-6485-0313 http://www.holtek.com.cn holtek semiconductor (hong kong) ltd. rm.711, tower 2, cheung sha wan plaza, 833 cheung sha wan rd., kowloon, hong kong tel: 852-2-745-8288 fax: 852-2-742-8657 holmate semiconductor, inc. 48531 warm springs boulevard, suite 413, fremont, ca 94539 tel: 510-252-9880 fax: 510-252-9885 http://www.holmate.com

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